> 19.10 | AT^SWDAC Configure and Read PWM Signal for DAC

> The AT^SWDAC controls the PWM (Pulse Width Modulation) signals generated by means of the DAC_OUT pin of the TC65 Module. The DAC_OUT pin is not available on the the TC65 Terminal, therefore AT^SWDAC applies only to the TC65 Module.
> Syntax

> Test Command AT^SWDAC=?
> Response(s)
> ^SWDAC:(list of supported <dc>s), (list of supported <oc>s), (list of supported <fq>s)
> OK

> Read Command AT^SWDAC?
> Response(s)
> ^SWDAC: <dc>, <oc>, <fq>
> OK
> ERROR
> +CME ERROR: <err>

> Write Command AT^SWDAC=<dc>[, <oc>[, <fq>]]
> Response(s)
> OK
> ERROR
> +CME ERROR: <err>

> Reference(s) |  | PIN |  | ASC0 | ASC1 | USB | MUX1 | MUX2 | MUX3 |  |  | Charge | Q | Last
> SIEMENS |  | - |  | + | + | + | + | + | + |  |  | - | + | -

> Parameter Description

> <dc>(num)

> Duty cycle in percentage steps
> 0...100

> <oc>(num)

> Open or close DAC
> 0
> Close DAC
> 1
> Open DAC

> <fq>(num)

> PWM frequency
> 0
> 320 Hz (accuracy of 1 percentage step)
> 1
> 970 Hz (accuracy of 3 percentage steps)
> 2
> 8,125 Hz (accuracy of 1 percentage step)
> 3
> 16,250 Hz (accuracy of 1 percentage step)
> 4
> 32,500 Hz (accuracy of 1 percentage step)
> 5
> 65,000 Hz (accuracy of 2 percentage steps)
> Example
> This example shows how to open the DAC_OUT output and change the duty cycle while using the same frequency.

> AT^SWDAC=50,1,2 | Initial opening of DAC_OUT, while setting PWM signal to 8,125 Hz at 50% duty cycle.
> OK
> AT^SWDAC=75 | Change duty cycle of the open DAC_OUT output.
> OK
> AT^SWDAC=80 | Change duty cycle of the open DAC_OUT output.
> OK
> AT^SWDAC=0,0 | Close DAC_OUT.
> OK